RTL Implementation Task: I2C Core Integration
RTL Implementation Task: I2C Core Integration: a task in TitanBench: A Benchmark for Agentic RTL Design and Verification (Harbor dataset). Implement rtl/i2c core.sv — the integration module that synchronizes SCL/SDA, wires together all I2C submodules, maps the register interface ( reg2hw / hw2reg…
The task
Implement **`rtl/i2c_core.sv`** — the integration module that synchronizes SCL/SDA, wires together all I2C submodules, maps the register interface (`reg2hw`/`hw2reg`) to the FSMs and FIFOs, drives SCL/SDA outputs (open-drain AND of controller and target with host override), detects SDA bus contention, halts the…
Part of billshockley/titanbench.